C2810 Exam

35 flashcards · Other · by Elsa Schutfort

1. A + 0 = A

   Identity Law

2. !(P + Q) = !P * !Q

   De Morgen's Law

3. B · 0 = 0

   Zero and One Law

4. A + B = B + A

   Commutative Law

5. A + (B + C) = (A + B) + C

   Associative Law

6. A · (B + C) = (A · B) +(A · C)

   Distributive Law

7. !M · M = 0

   Inverse Law

8. In a half adder, if the two single-bit inputs are 1 and 1, what are the sum and carry outputs, respectively?

   Sum = 0, Carry = 1

9. In a 4-bit ripple-carry adder, how is the carry-out of one full adder connected to the next full adder? a) The carry-out of each adder is connected to the carry-in of the next adder b) The carry-out of each adder is not connected to any other adder c) The carry-out of the first adder is connected to the carry-in of the third adder d) The carry-out of each adder is connected to the sum input of the next adder

10. What is the purpose of the select lines in a multiplexer? a) To choose which input line is connected to the output. b) To split a single input into multiple outputs. c) To decode binary data into a usable form. d) To power the multiplexer.

    a

11. For an SR latch, what will be the outputs (Q, Q') when the following inputs are applied: S = 0 and R = 1?

    Q = 0, Q' = 1

12. What is the main difference in the operation of a D latch compared to an SR latch? a) D latch can store two bits of data, whereas SR latch can store only one. b) D latch has three inputs while SR latch has two. c) D latch requires a clock signal, whereas an SR latch does not. d) D latch eliminates the invalid state of the SR latch (when S and R are both 1)

    d

13. How does a D flip-flop differ from a D latch in terms of data storage and output? a) D flip-flop changes its output on the clock's rising or falling edge, while a D latch is level triggered. b) D flip-flop and D latch both change their output immediately when input changes. c) D flip-flop has multiple data inputs while a D latch has only one. d) D flip-flop is faster in operation than a D latch.

    a

14. In sequential circuits, why is a clock signal necessary? a) It provides a reference voltage for the circuits. b) It decreases power consumption by synchronizing the circuit operations. c) It increases the speed of the circuit operation. d) It synchronizes the operations of multiple flip-flops.

    d

15. What is the primary role of registers in a processor's CPU? a) To manage the input/output operations of the CPU. b) To increase the storage capacity of the main memory (RAM). c) To store the boot-up instructions of the computer system. d) To store intermediate data and instructions that the CPU is currently processing.

    d

16. Register files typically have faster access than main computer RAM memory

    True

17. In the context of register files used in CPUs, what is the primary function they serve? a) They act as a buffer between the CPU and the main memory. b) They store the results of arithmetic and logical operations temporarily. c) They are used to store the addresses where instructions and data are located. d) They manage the input/output operations of the CPU.

    b

18. At the end of the multiplication process for the hardware discussed in class, what is the value in the multiplicand register. Assume we are multiplying 2 4-bit numbers a) 00000000 b) 11111111 c) The original 4-bit multiplicand occupies the left half of the register. The right half is filled with 0s d) The multiplicand register remains unchanged

    c

19. Which element in circuitverse would be best to perform a left shift / right shift operation on a binary number? a) Multiplexer b) Decoder c) Splitter d) Register

    c

20. If you were to extend the signed number, 1010, to 8 bits, what would the result be? a) 11111010 b) 10101111 c) 00001010 d) You can't extend 1010 to 8 bits

    a

21. Consider the division algorithm discussed in lecture. The first step is an iteration is to... a) Add the divisor to the remainder b) Set the rightmost bit of the quotient to 0 or 1, depending c) Subtract the divisor from the remainder d) Shift the divisor and quotient

    c

22. Which division register would this circuit feed into? a) Divisor b) Quotient c) Product d) Remainder

    b

23. What mathematical operation is equivalent to left-shifting a binary number? a) Addition of 2 b) Dividing by 2 c) Subtraction by 2 d) Multiplying by 2

    d

24. For an SR latch, what will be the outputs (Q, Q') when the following inputs are applied: S = 0 and R = 1? a) Q = 0, Q' = 1 b) Q = 1, Q' = 0 c) Q = 1, Q' = 1 d) Undefined State

    a

25. What is the main difference in the operation of a D latch compared to an SR latch? a) D latch can store two bits of data, whereas SR latch can store only one. b) D latch has three inputs while SR latch has two. c) D latch requires a clock signal, whereas an SR latch does not. d) D latch eliminates the invalid state of the SR latch (when S and R are both 1)

    d

26. How does a D flip-flop differ from a D latch in terms of data storage and output? a) D flip-flop changes its output on the clock's rising or falling edge, while a D latch is level triggered. b) D flip-flop and D latch both change their output immediately when input changes. c) D flip-flop has multiple data inputs while a D latch has only one. d) D flip-flop is faster in operation than a D latch.

    a

27. In sequential circuits, why is a clock signal necessary? a) It provides a reference voltage for the circuits. b) It decreases power consumption by synchronizing the circuit operations. c) It increases the speed of the circuit operation. d) It synchronizes the operations of multiple flip-flops.

    d

28. In a half adder, if the two single-bit inputs are 1 and 1, what are the sum and carry outputs, respectively?

    Sum = 0, Carry = 1

29. In a 4-bit ripple-carry adder, how is the carry-out of one full adder connected to the next full adder? a) The carry-out of each adder is connected to the carry-in of the next adder b) The carry-out of each adder is not connected to any other adder c) The carry-out of the first adder is connected to the carry-in of the third adder d) The carry-out of each adder is connected to the sum input of the next adder

    d

30. The three main components of the IEEE 754 standard for floating point arithmetic, in order from MSB to LSB are the

    Sign, Exponent, and Mantissa

31. In the IEEE 754 Standard, the bias subtracted from the exponent is

    127

32. How many combinations of a 32-bit floating point number could result in "positive infinity", in the IEEE 754 standard?

    1

33. Roughly half of all positive floating point numbers are in the range (0, 1)

    true

34. How many ASCII characters could you fit in a 16 bit binary number?

    2

35. Unicode lacks support for characters from many international languages, leading to the widespread adoption of ASCII

    False